摘要

Wide locking range is an important parameter for injection-locked frequency divider (ILFD) to cope with the supply voltage variation. This paper proposes a wide locking range divide-by-4 ILFD implemented in the TSMC 0.18 mu m 1P6 M CMOS process. The ILFD uses a capacitive cross-coupled voltage-controlled oscillator as the core. The dc gate bias of cross-coupled FETs is smaller than dc drain bias to optimize the power and locking range. Dual-resonance LC resonator is also used to enhance the locking range. At the drain-source bias of 1.2 V, and at the incident power of 0 dBm the measured locking range of divide-by-4 ILFD is 3.3 GHz, from the incident frequency 7.5-10.8 GHz, the percentage is 36.06%. The core power consumption is 11.83 mW. The die area is 0.883 x 0.851 mm(2).

  • 出版日期2016-1