摘要
A high efficiency two-step capacitor switching scheme for a successive approximation register analogue-to-digital converter is presented. Two-step architecture, split capacitor array, C-2C dummy capacitor and multiple switching schemes are combined in the proposed switching scheme. The proposed switching scheme achieves a 99.75 % reduction in switching energy and the total capacitance is reduced 85.9 % compared with the conventional architecture.
- 出版日期2016-1
- 单位西安电子科技大学