A 32-bit 16-program-cycle nonvolatile memory for analog circuit calibration in a standard 0.18 mu m CMOS

作者：Lee Jun Gyu^*; Masui Shoichi

来源：IEICE Electronics Express, 2012, 9(6): 477-483.

• nonvolatile memory
• memory architecture
• analog calibration

We propose a 32-bit 16-program-cycle nonvolatile memory fabricated in a standard 0.18 mu m CMOS technology based on a channel hot-electron trapping at the transistor gate sidewall. Its target application is calibration of RF/analog circuits for multiband/multimode communication systems, that demands in-field multiple-time programmability and data select-ability. The issue of the one-time programmability in the proposed memory cell is overcome by the addressing memory cell array, and the promised reliability is observed through the optimization of program and restore operations. The developed nonvolatile memory is applied to a dual-band PLL synthesizer with an area overhead of 8.5%.

• 出版日期2012-3-25