A cryogenic SAR ADC for infrared readout circuits

作者：Zhao Hongliang~ Zhao Yiqiang~ and Zhang Zhisheng~ School of Electronic Information Engineering Tianjin University Tianjin China College of Physics Liaoning University Shenyang China

来源：半导体学报, 2011, (11): 152-156.

• cryogenic ADC
• low power
• successive approximation register
• temperature-compensated time-based comparator

<正>A cryogenic successive approximation register(SAR) analog to digital converter(ADC) is presented. It has been designed to operate in cryogenic infrared readout systems as they are cooled from room temperature to their final cryogenic operation temperature.In order to preserve the circuit’s performance over this wide temperature range,a temperature-compensated time-based comparator architecture is used in the ADC,which provides a steady performance with ultra low power for extreme temperature(from room temperature down to 77 K) operation.The converter implemented in a standard 0.35μm CMOS process exhibits 0.64 LSB maximum differential nonlinearity (DNL) and 0.59 LSB maximum integral nonlinearity(INL).It achieves 9.3 bit effective number of bits(ENOB) with 200 kS/s sampling rate at 77 K,dissipating 0.23 mW under 3.3 V supply voltage and occupies 0.8×0.3 mm~2.

• 出版日期2011-11-15
• 单位天津大学