A 10 Gb/s adaptive analog decision feedback equalizer for multimode fiber dispersion compensation in 0.13 mu m CMOS

作者：Kargar Mahyar; Khaliliadl Pouria; Green Michael M^*

来源：Analog Integrated Circuits and Signal Processing, 2015, 83(2): 271-283.

DOI：10.1007/s10470-015-0528-9

• Broadband communications
• Binary phase detectors
• Clock data recovery
• CMOS
• Decision feedback equalizers
• Integrated circuits

A 10 Gb/s adaptive analog decision feedback equalizer with 6 taps is realized in 0.13 m CMOS. An analog implementation of the LMS algorithm is used to continuously adapt the feedback filter coefficients. A clock and data recovery circuit is used to extract the clock from the DFE output. The adaptive DFE dissipates 318 mW, not including output buffers, and can equalize PRBS data corrupted by a 300-m multimode fiber achieving BER .

• 出版日期2015-5