摘要

This work proposes a simple method to enhance amplitude stability in Pierce crystal oscillator. The method is based on a modification of the conventional Pierce oscillator. The proposed topology is all-analog, yet it does not use an amplifier-based feedback loop for amplitude control, hence, it saves power, reduces complexity, and layout area. The proposed method does not adversely impact oscillator%26apos;s phase noise, and gives good amplitude control results against process, voltage, and temperature (PVT) variations. An example design for a 40 MHz Pierce crystal oscillator is implemented in a standard 0.13 mu m CMOS technology and compared to conventional Pierce oscillator results. The current consumption of the oscillator core is 500 mu A off 1.2 V supply. The proposed method is extensible to other CMOS VCOs, including Giga-Hertz ones, to reduce design margins on VCO gain.

  • 出版日期2012-3