A Robust and Power-Effcient SoC Implementation in 65nm

作者：Bin Xiao Yi Fu Zhang Yan Ping Gao Liang Yang Dong Mei Wu and Bao Xia Fan State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing China University of Chinese Academy of Sciences Beijing China Loongson Technology Corporation Limited Beijing China

来源：Journal of Computer Science and Technology, 2013, (04): 682-688.

• System-on-Chip
• on-chip-variation
• PVT detector
• low power
• hierarchical design flow

Godson2H is a complex SoC (System-on-Chip) of Godson series, which is a 117mm2, 152 million transistors chip fabricated in 65nm CMOS LP/GP process technology. It integrates a 1GHz processor core and abundant high or low speed peripheral IO interfaces. To overcome on-chip-variation problems in deep submicron designs, many methods are adopted in clock tree, and PVT detectors are integrated for debug. To meet the low power constraints in different applications, most of state-of-the-art low power methods are used carefully, such as dynamic voltage and frequency scaling, power gating and aggressive multi-voltage design.

• 出版日期2013-7-15
• 单位中国科学院大学