A fast algorithm and its VLSI architecture for fractional motion estimation for H.264/MPEG-4 AVC video coding

作者：Wang Yu Jen^*; Cheng Chao Chung; Chang Tian Sheuan

来源：IEEE Transactions on Circuits and Systems for Video Technology, 2007, 17(5): 578-583.

DOI：10.1109/TCSVT.2007.894050

• H.2641AVC
• motion estimation
• video coding

This paper presents a fast algorithm and its VLSI architecture for H.264 fractional motion estimation. Motivated by the high correlation of cost between neighboring fractional pel position, the proposed algorithm efficiently explores the neighborhood position around the minimum one and thus skips other unlikely ones. Thus, the proposed search pattern and early termination under constant quantization parameter can reduce about 50% of computation complexity compared to that in reference software but only with 0.1-0.2 dB peak signal-to-noise ratio degradation and less than 2% of bit rate increase. The VLSI architecture of the proposed algorithm thus can save 40% of area cost due to only half of the processing elements and save 14% of searching time when compared with the previous design.

• 出版日期2007-5
• 单位中国科学院电工研究所