A 96.5% Efficiency Current Mode Hysteretic Buck Converter With 1.2% Error Auto-Selectable Frequency Locking

作者：Seo Jeong Il^*; Lim Baek Min; Lee Sang Gug

来源：IEEE Transactions on Power Electronics, 2018, 33(9): 7733-7743.

DOI：10.1109/TPEL.2017.2766691

• Auto-selectable frequency locking
• current mode hysteretic buck converter
• hysteresis and resistance control
• light load condition

This paper proposes a current mode hysteretic buck converter with auto-selectable frequency locking. In this work, the hysteresis of the hysteretic comparator and the resistance of the feedback network are adjusted simultaneously to fix the switching frequency. The proposed switching frequency locking scheme can improve the power efficiency and fix the spectral components of the output at specific frequencies by suitably lowering the switching frequency under light load conditions. Implemented in a 65 nm complementary metal oxide semiconductor (CMOS), the proposed converter achieves peak efficiency of 96.5% for a 3.3 V input with less than 1.2% frequency error while locking at 1, 0.5, and 0.25 MHz.

• 出版日期2018-9