A Loop Gain Optimization Technique for Integer-N-TDC-Based Phase-Locked Loops

作者：Kuan Ting Kuei^*; Liu Shen Iuan

来源：IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2015, 62(7): 1873-1882.

DOI：10.1109/TCSI.2015.2423793

• Digital phase-locked loop
• discrete-time domain analysis
• jitter minimization
• loop gain optimization
• loop latency
• stability
• time-to-digital converter

This paper presents a loop gain optimization technique for integer-digital phase-locked loops with a time-to-digital converter. Due to noise filtering properties, a phase-locked loop has an optimal loop gain which gives rise to the best jitter performance, taking into account external and internal noise sources. By using the loop gain optimization technique, the digital phase-locked loops can automatically attain this loop gain in background to minimize the jitter. Theoretical analysis is presented. The stability issue and the impact of loop latency are also discussed. Finally, the analysis is compared to behavioral simulations with good agreement.

• 出版日期2015-7
• 单位中国科学院电工研究所