A LOW POWER CRYOGENIC CMOS ROIC DESIGN FOR 512 x 512 IRFPA

作者:Zhao Hongliang*; Zhao Yiqiang; Song Yiwei; Liao Jun; Geng Junfeng
来源:Journal of Circuits, Systems, and Computers, 2013, 22(10).
DOI:10.1142/S0218126613400331

摘要

A low power readout integrated circuit (ROIC) for 512 x 512 cooled infrared focal plane array (IRFPA) is presented. A capacitive trans-impedance amplifier (CTIA) with high gain cascode amplifier and inherent correlated double sampling (CDS) configuration is employed to achieve a high performance readout interface for the IRFPA with a pixel size of 30 x 30 mu m(2). By optimizing column readout timing and using two operating modes in column amplifiers, the power consumption is significantly reduced. The readout chip is implemented in a standard 0: 35 mu m 2P4M CMOS technology. The measurement results show the proposed ROIC achieves a readout rate of 10MHz with 70mW power consumption under 3.3V supply voltage from 77K to 150K operating temperature. And it occupies a chip area of 18: 4 x 17: 5 mm(2).

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