A 130 mV SRAM With Expanded Write and Read Margins for Subthreshold Applications

作者：Chang, Meng-Fan^*; Chang, Shi-Wei; Chou, Po-Wei; Wu, Wei-Cheng

来源：IEEE Journal of Solid-State Circuits, 2011, 46(2): 520-529.

DOI：10.1109/JSSC.2010.2091321

• Low supply voltage
• SRAM
• read disturb
• subthreshold voltage
• write margin

SRAM suffers read-disturb and write failures at a low supply voltage, especially at deep subthreshold operation. This study proposes a 9T-SRAM cell with a data-aware-feedback-cutoff (DAFC) scheme to enlarge the write margin and dynamic-read-decoupled (DRD) scheme to prevent read-disturb for achieving deep subthreshold operation. A 30 mV negative-pumped wordline scheme is employed to suppress bitline leakage current. The fabricated 90 nm 32 Kb 9T-SRAM macro achieves 130 mV VDDmin. All the 32 Kb 9T cells are stable across read and write operations when operated at 105 mV.

• 出版日期2011-2
• 单位清华大学