Sparse Channelizer for FPGA-Based Simultaneous Multichannel DRM30 Receiver

作者：Happi Brunel^*; Romain Tietche Olivier; Denby Bruce

来源：IEEE Transactions on Consumer Electronics, 2015, 61(2): 151-159.

DOI：10.1109/tce.2015.7150568

• Channelization
• FPGA
• DRM30
• Indexing applications

The paper describes a channelization architecture that simultaneously extracts all radio stations in the DRM30 standard, that is intended to be an important part of a future receiver to simultaneously demodulate the entire 0 - 30 MHz broadcast band for content and metadata indexing applications. The system, which contains overlap-add and Goertzel algorithms, is implemented on a single Field-Programmable Gate Array (FPGA), thus offering the possibility of use in real time applications. This novel architecture achieves superior efficiency by minimizing multiplication calculational resources, as compared to existing FPGA-based channelizers. Chip resource utilization details and experimental results from the developed prototype are also presented(1).

• 出版日期2015-5