A novel two-channel continuous-time time-interleaved 3rd-order sigma-delta modulator with integrator-sharing topology

作者：Talebzadeh Jafar^*; Kale Izzet

来源：Analog Integrated Circuits and Signal Processing, 2018, 95(3): 375-385.

DOI：10.1007/s10470-018-1125-5

• Discrete-time
• Continuous-time
• Delta-sigma modulator
• Signal transfer function
• Noise transfer function
• Time-interleaved

This paper presents a 3rd-order two-path continuous-time time-interleaved (CTTI) delta-sigma modulator which is implemented in standard 90 nm CMOS technology. The architecture uses a novel method to resolve the delayless feedback path issue arising from the sharing of integrators between paths. By exploiting the concept of the time-interleaving techniques and through the use time domain equations, a conventional single path 3rd-order discrete-time (DT) Delta Sigma modulator is converted into a corresponding two-path discrete-time time-interleaved (DTTI) counterpart. The equivalent CTTI version derived from the DTTI Delta Sigma modulator by determining the DT loop filters and converting them to the equivalent continuous-time loop filters through the use of the Impulse Invariant Transformation. Sharing the integrators between two paths of the reported modulator makes it robust to path mismatch effects compared to the typical time-interleaved modulators which have individual integrators in all paths. The modulator achieves a dynamic range of 12 bits with an OverSampling Ratio of 16 over a bandwidth of 10 MHz and dissipates only 28 mW of power from a 1.8-V supply. The clock frequency of the modulator is 320 MHz but integrators, quantizers and DACs operate at 160 MHz.