摘要

This paper presents a 76-84 GHz low-power 4-element phased array receiver built using a 0.13 mu m BiCMOS process. The power consumption is reduced by using a single-ended design and alternating the amplifiers and phase shifter cells to result in a low noise figure at a low power consumption. A variable gain amplifier and an 11 degrees trim bit are used to correct for the rms gain and phase errors at different operating frequencies. The phased array consumes 32 mW per channel and results in a gain of 10-19 dB at 76-84 GHz, a noise figure of 10.5 +/- 0.5 dB at 80 GHz and an rms gain and phase error <0.8 dB and 7.2 degrees, respectively, up to 81 GHz, and <1.1 dB and 10.4 degrees up to 84 GHz. The phased array also shows a channel to channel coupling of <-30 dB up to 84 GHz. To our knowledge, this work presents state-of-the-art on-chip performance at W-band frequencies.

  • 出版日期2012-2