摘要

A new double gate SOI LDMOS with a step doping profile in the drift region is proposed. The structure is characterized by one surface gate and another embedded gate under the P-body region. The broadened current flow path and the majority carrier accumulation layer on the side wall of the embedded gate reduce the specific on-resistance (Ron, sp). The electric field distribution is improved due to the embedded gate and step doping profile, resulting in a high breakdown voltage (BV) and low Ron, sp. The influences of device parameters on BV and Ron, sp are investigated by simulation. The results indicate that BV is increased by 35.2% and R on, sp is decreased by 35.1% compared to a conventional SOI LDMOS. ? 2009 Chinese Institute of Electronics.

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