A novel multiply multiple accumulator component for low power PDSP design

作者:Sundararajan Vijay; Parhi Keshab K.
来源:25th IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2000, 2000-06-05 to 2000-06-09.
DOI:10.1109/ICASSP.2000.860092

摘要

This paper presents a novel programmable digital signal processor (PDSP) component called the multiply multiple accumulator (MMAC). The MMAC differs from a standard multiply accumulator (MAC) in that it has k addressable accumulators rather than 1 in the case of the MAC. It is demonstrated that this feature of the MMAC can provide for low power scheduling of FIR filter operations. Typically, the number of read accesses to associated memories can come down, asymptotically, by a factor of k. The switching activity of associated multipliers also comes down by a factor of k.

  • 出版日期2000

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