摘要

This paper presents a power-efficient fully digital amplifier (FDA) with low-power consumption for portable audio systems. Input dependent bit flipping (IDBF) technique is proposed and employed in the FDA to reduce the switching rate of the 1-bit delta-sigma modulator (DSM) compared to conventional 1-bit DSM-based FDAs, thus lowering pulse repetition frequency (PRF). Experimental results verified on FPGA demonstrate that the PRF with IDBF is the range between 426 KHz and 466 KHz depending on input amplitude, whereas the PRF without IDBF is the range between 722 KHz and 1020 KHz. Therefore, the proposed amplifier significantly improves power efficiency without serious degradation of the signal-to-noise ratio (SNR)(1).

  • 出版日期2010-11