The effectiveness of a current flattening circuit as countermeasure against DPA attacks

作者：Vahedi Haleh^*; Gregori Stefano; Muresan Radu

来源：Microelectronics Journal, 2011, 42(1): 180-187.

DOI：10.1016/j.mejo.2010.08.011

• Current flattening
• Current injection
• Differential power analysis attack
• Secure microsystems

This paper presents an on-chip current flattening circuit designed in 0.18-mu m CMOS technology, which can be integrated with secure microsystems, such as smart cards, as a countermeasure against power analysis attacks. The robustness of the proposed countermeasure is evaluated by measuring the number of current traces required for a differential power analysis attack. We analyze the relationship between the required number of current traces and the dynamic current variations, and we show empirically that the required numbers of current traces is proportional to an inverse of the square of the rms value of the flattened current. Finally, we evaluate the effectiveness of the proposed design by using the experimental results of the fabricated chip. The analysis of the experimental results confirms the effectiveness of the current flattening circuit.

• 出版日期2011-1