AN INTEGRATED KA-BAND VCO AND DIVIDE-BY-4 FREQUENCY DIVIDER WITH 30.2% TUNING RANGE IN 90-NM CMOS

作者：Alsuraisry Hamed; Cheng Jen Hao; Li Wei Tsung; Tsai Jeng Han^*; Huang Tian Wei

来源：Microwave and Optical Technology Letters, 2017, 59(6): 1305-1309.

DOI：10.1002/mop.30520

• CMOS
• forward-body-bias
• phased-locked loop (PLL)
• VCO
• frequency divider
• switched inductor

This article presents a wideband phase-locked loop (PLL) front-end, which consists of a dual-core voltage-controlled oscillator (VCO) and a divide-by-four (D4) frequency divider in 90-nm CMOS technology. The switched inductors and varactor banks are used to enhance the tuning range of VCO. The D4 frequency divider is a bodybiased injection-locked frequency divider (ILFD) cascoded with sourceinjection current mode logic (SICML) for wider locking range and lower power consumption. This PLL front-end demonstrates a 30.2% frequency tuning range (FTR) from 23.6 to 32 GHz and a phase noise of -101.22 dBc/Hz at 5.86 GHz with 1 MHz offset frequency. The output power is higher than -15 dBm among the operating bandwidth. The dc power consumption is 40.8 mW at 1.2 V and 1.5 V supply voltages.

• 出版日期2017-6