An XOR-based parameterization for instruction register files

作者：Fujieda Naoki^*; Ichikawa Shuichi

来源：IEEJ Transactions on Electrical and Electronic Engineering, 2015, 10(5): 592-602.

DOI：10.1002/tee.22123

• computer architecture
• embedded systems
• instruction fetch
• instruction register files

The instruction register file (IRF) shortens and obfuscates instruction sequences by compressing multiple instructions into a packed instruction. The IRF could improve its efficiency by parameterization, but the previously proposed parameterization techniques did not extract the similarity of instructions well. In this paper, we propose an XOR-based parameterization to utilize the limited capacity of the IRF more efficiently. According to our evaluation, with an improved algorithm of instruction selection, our approach makes 20.2% more dynamic instructions IRF-resident than the previous techniques. It also reduces the number of instruction fetches from the cache by 6.3% on average. We also confirmed that the hardware overhead of our parameterization was about a quarter of the previous one.

• 出版日期2015-9