An 180 nm CMOS 1.84-to-3.62 GHz fractional-N frequency synthesizer with skewed-reset PFD for removing noise-folding effect

作者：Bae Sang Geun^*; Kim Kyeong Woo; Hwang In Chul

来源：IEICE Electronics Express, 2014, 11(15): 20140490.

DOI：10.1587/elex.11.20140490

• fractional-N frequency synthesizer
• mobile TV tuner
• noise folding effect
• sampled loop filter
• skewed-reset PFD

To remove the noise folding effect, which is a primary cause of degradation of the close-in phase noise of fractional-N phase-locked loops (PLLs) that use sigma-delta modulation, a fractional-N frequency synthesizer for broad-band and multi-standard mobile TV tuners was designed. The proposed skewed-reset phase frequency detector (SR-PFD) provides a key solution to the problem of noise folding by enhancing the linearity of the phase frequency detection path through the charge pump (CP). Degradation of the reference spur - the unwanted effect in SR-PFDs - is blocked through the use of a sampled loop filter. An SR-PFD in a frequency synthesizer fabricated on a 180 nm CMOS process enhanced phase noise by 10 dB or more by using a multi stage noise shaper (MASH) 1-1-1 sigma-delta modulator (SDM), while a sampled loop filter decreased the amplitude of the reference spur by 7-13 dB.

• 出版日期2014