Analysis of op-amp phase margin impact on SC Sigma Delta modulator performance

作者：Pugliese Andrea^*; Amoroso Francesco A; Cappuccino Gregorio; Cocorullo Giuseppe

来源：Microelectronics Journal, 2010, 41(7): 440-446.

DOI：10.1016/j.mejo.2010.05.002

• Sigma-delta modulator
• Switched-capacitor (SC) integrator
• Behavioural modelling
• Operational amplifier (op-amp)
• Transient response
• Settling time

The impact of operational amplifier (op-amp) phase margin on switched-capacitor (SC) sigma-delta modulator (Sigma Delta M) performance is investigated in this paper. An ad-hoc integrator settling model is developed and verified by circuit simulations performed in a commercial 0.35 mu m CMOS technology. The model allows the effect of op-amp phase margin to be taken into account in Sigma Delta M behavioural analysis. Behavioural simulations of a typical single-bit second-order modulator are presented, as an example. As shown, the proposed analysis allows well-found specifications for the op-amp unity-gain frequency, slew rate and phase margin to be defined since the preliminary behavioural simulation phase.

• 出版日期2010-7