A 30-GHz 10-dB low noise amplifier using standard 0.18-mu m simulated CMOS technology

作者：Tu Hsin Lung; Yang Tsung Yu; Liang Kung Hao; Chiou Hwann Kaeo

来源：Microwave and Optical Technology Letters, 2007, 49(3): 647-649.

DOI：10.1002/mop.22226

• low noise amplifier
• 0.18-mu m CMOS
• MMIC

A three-stage 30-GHz low noise amplifier (LNA) was designed and fabricated in a standard 0.18-mu m CMOS technology. The LNA has demonstrated a 10-dB gain and a minimum noise figure of 5.2 dB at 30 GHz. The achieved input 1-dB compression point (IP1 dB) and third order intercept point (IP3) are -7 and +2.5 dBm, with total current of 16 mA front a 1.5-V power supply. To the author's knowledge, the LNA shows the best overall performances ever reported in standard 0.18-mu m CMOS process.

• 出版日期2007-3
• 单位中央民族大学