Analysis and optimisation of lateral thin-film silicon-on-insulator (SOI) PMOS transistor with an NBL layer in the drift region

作者：Cortes I^*; Toulon G; Morancho F; Flores D; Hugonnard Bruyere E; Villard B

来源：Solid-State Electronics, 2012, 70: 8-13.

DOI：10.1016/j.sse.2011.11.012

• Thin-SOI technology
• CMOS
• LDMOS
• RESURF
• P-channel
• NBL
• TCAD

This paper analyses the experimental results of voltage capability (V-BR %26gt; 120 V) and output characteristics of a new lateral power P-channel MOS transistors manufactured on a 0.18 mu m SOI CMOS technology by means of TCAD numerical simulations. The proposed LDPMOS structures have an N-type buried layer (NBL) inserted in the P-well drift region with the purpose of increasing the RESURF effectiveness and improving the static characteristics (Ron-sp/V-BR trade-off) and the device switching performance. Some architecture modifications are also proposed in this paper to further improve the performance of fabricated transistors.

• 出版日期2012-4