科研之友
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摘要
This paper presents a current stimulator circuit that its output can be configured to generate the three most efficient current waveforms used in neural stimulation; rising exponential, falling exponential and rectangular. The stimulation amplitude range can be varied from 0 to 1 mA in a manner that each range can be divided into 16 steps by a 4 bit binary weighted digital to analog converter (DAC). The DAC features the maximum DNL and INL of 0.008 and 0.096 LSB respectively. Rising and falling exponential time constants are tunable from 13 to 106 s. The approach for producing both rising and falling exponential currents is to apply a controllable rising and falling ramp voltage to the gate of the NMOS transistors which are biased to work in the subthreshold region while for the rectangular pulse, a constant subthreshold voltage is needed instead. The ramp generator used in exponential mode, employs a proposed low power 5 nA current source followed by a 3-bit current steering DAC. In the output stage, the stimuli current is buffered through the gain boosting technique which needs the maximum headroom voltage of 0.15 V. The DC output impedance is increased up to at least 24 M. A simple electrode shortening is used for the charge balancing purpose at the end of the stimulation phases. The presented stimulator is designed and simulated in a 180nm CMOS technology and for the output driver, a HV 180 nm CMOS is used with the supply voltage equal to 3.3 V. The simulated power consumption of the proposed stimulator for one channel is 23.2 and the maximum achieved power efficiency is 94.7 .
- 出版日期2016-3
