A high CMRR low power fully differential Current Buffer

作者：Azhari Seyed Javad^*; Safari Leila

来源：IEICE Electronics Express, 2010, 7(11): 765-771.

DOI：10.1587/elex.7.765

• current mode
• low input impedance stage
• fully differential Current Buffer
• high CMRR Current Buffer
• low power Current Buffer

In this paper a low power fully differential current buffer is introduced which performs high CMRR exploiting a novel method to alleviate common mode gain. The proposed current buffer is designed and simulated with HSPICE in 0.18 mu m CMOS process and supply voltage of +/- 0.75 V. The simulation results show an 8.48 Omega input resistance, 98 dB CMRR, 369 MHz bandwidth and power dissipation of 135 mu W. The corner case simulation has been done which shows an acceptable performance for the proposed buffer in all situations. The proposed circuit tends to be the fundamental block of a new family of electronic differential topologies greatly capable to be much further improved and utilized.

• 出版日期2010-6-10