Automatic Design and Yield Enhancement of Data Converters

作者：Mirzaie Nahid^*; Shamsi Hossein; Byun Gyung Su

来源：Journal of Circuits, Systems, and Computers, 2017, 26(1): 1750018.

DOI：10.1142/S0218126617500189

• Analog integrated circuits
• data converter
• automatic design
• yield
• evolutionary algorithm

Data converters play a key role in modern analog/mixed-signal systems. Accordingly, it is important to investigate their performance and yield under uncertain parameters over the design process. An efficient approach for automatic design and yield enhancement of data converters is presented. The proposed algorithm generates a general netlist for each data converter and improves transistor sizing to reach acceptable values for performance parameters with an evolutionary process, and finds the best yield simultaneously. The applied framework on two data converter structures demonstrates a reliable circuit with optimum performance, power consumption, and area overhead over a single evolutionary process in 0.18 mu m technology.

• 出版日期2017-1