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摘要
This paper proposes a novel phase-shifted zero-voltage and zero-current-switching (ZVZCS) pulsewidth modulation full-bridge converter, which realizes ZVS for the leading leg and ZCS for the lagging leg. A blocking capacitor is added in series with the primary winding of the transformer to make the primary current decay to zero during zero state to ensure ZCS for the lagging leg. In order to prevent the primary current from reversing during zero state, two diodes in series with the lagging leg are added. The principle of operation, steady-state analysis, and design procedures are presented. The experimental results are also included to verify the theoretical analysis.
- 出版日期2001-8
- 单位南京大学
