摘要

A subthreshold ECG processor in 45-nm IBM SOI CMOS is designed to operate at the minimum energy operating point (MEOP). Statistical error compensation (SEC) is employed to further reduce energy (E-min) at the MEOP. SEC is shown to reduce E-min by 28% compared with the conventional (error-free) case while maintaining acceptable beat-detection performance. SEC enables the supply voltage to be scaled to 15% below its critical value at MEOP, while compensating for a 58% precorrection error rate p(e). These results represent an improvement of 19x in beat-detection performance and 600x in p(e) over conventional (error-free) systems. The prototype IC consumes 14.5 fJ/cycle/1k-gate and exhibits 4.7x better energy efficiency than the state of the art while tolerating 16x more voltage variations.

  • 出版日期2013-11