A 0.4-V, 90 similar to 350-MHz PLL With an Active Loop-Filter Charge Pump

作者：Moon Joung Wook^*; Choi Kwang Chun; Choi Woo Young

来源：IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2014, 61(5): 319-323.

DOI：10.1109/TCSII.2014.2312800

• Active-loop filter (ALF)
• body-bias technique
• charge pump (CP) current matching
• phase-locked loop (PLL)
• power efficiency
• reference spur
• ultralow voltage (ULV)

A 0.4-V phase-locked loop (PLL) that has much improved power efficiency is realized in standard 65-nm CMOS. The PLL employs a novel ultralow-voltage charge pump that compensates current mismatch with an active loop filter and produces significantly reduced reference spurs. Its voltage-controlled oscillator (VCO) is designed with the body-bias technique and includes an automatic frequency calibration circuit that provides low VCO gain and wide tuning range. The PLL output frequency can be tuned from 90 to 350 MHz. At 350-MHz output, the PLL consumes 109 mu W, which corresponds to the power efficiency of 0.31 mW/GHz.

• 出版日期2014-5