ASIC design of an LDPC encoder for satellite-ground high-speed data transmission system

作者：Zhang Hao; Yin Liu Guo

来源：Journal of Astronautics, 2015, 36(1): 96-102.

DOI：10.3873/j.issn.1000-1328.2015.01.013

• Chip design
• Dynamic power dissipation
• Earth observation satellites
• High-speed data transmission systems
• LDPC encoder
• Multi-code
• Satellite communications
• Taiwan semiconductor manufacturing companies

In this paper, a high-speed and multi-code-rate low density parity check(LDPC) encoder architecture is proposed for the LDPC codes used in high-speed satellite-ground data transmission of the Chinese high resolution earth observation satellite. Synthesized with Taiwan semiconductor manufacturing company (TSMC) 130 nm complementary oxide metal semiconductor (COMS) standard cell library, the designed multi-code-rate LDPC encoder can achieve 1.6 Gbps throughput in 200 MHz clock frequency, the die size of which is only 5.495 mm2, and the dynamic power dissipation of which is only 184.3 mW. Compared with the encoder designed by the traditional LDPC encoder architecture, the memory size, the die size, and the power consumption of the new encoder can be reduced by 18.52%, 20.3% and 83.3% respectively.

• 出版日期2015
• 单位清华大学