A sequential logic device realized by integration of in-plane gate transistors in InGaAs/InP

作者：Sun Jie; Wallin Daniel; He Yuhui; Maximov Ivan; Xu H Q^*

来源：Applied Physics Letters, 2008, 92(1): 012116.

DOI：10.1063/1.2825575

An integrated nanoelectronic circuit is fabricated from a high-mobility In(0.75)Ga(0.25)As/InP heterostructure. The manufactured device comprises two double in-plane gate transistors with a current channel of 1.1 mu m in length and 100 nm in width. The two transistors are coupled to each other in a configuration that the source of one transistor is directly connected with one in-plane gate of the other transistor. Electrical measurements reveal that this device functions as an SR (set-reset) latch (a sequential logic device) with a gain of similar to 4 in the logic swing at room temperature. The demonstrated device provides a simple circuit design for SR latches.

• 出版日期2008-1-7