摘要

This paper is devoted to local parametric fault diagnosis of nonlinear analog integrated circuits designed in a bipolar and CMOS technology. An algorithm is proposed that allows estimating values of the considered set of the parameters. The algorithm exploits a diagnostic test performed in a dc state, leading to output voltages measured in the circuit. Each of the output voltages is a parameterized function. A system of overdetermined equations fitting the parameterized functions to the data points is created. An efficient iterative method is developed for solving this overdetermined system of nonlinear equations exploiting the idea of the normal equation and a homotopy concept. It is implemented in the manner that allows operating with the functions not given in the explicit analytical form, which commonly occurs in real nonlinear circuits. For illustration, two examples are given, including a circuit with bipolar transistors and a CMOS circuit designed in a nanometer technology. They reveal the effectiveness of the proposed method.

  • 出版日期2018-2