A Direct 100 GHz Parametric CMOS Tripler

作者：Kabir Shahana^*; Magierowski Sebastian; Messier Geoffery G; Zhao Zhixing

来源：IEEE Microwave and Wireless Components Letters, 2013, 23(10): 557-559.

DOI：10.1109/LMWC.2013.2250271

• CMOS
• frequency multiplier
• millimeter-wave
• parametric circuit
• tripler

The first direct anti-series CMOS tripler is described in this letter. MOS varactors are arranged in a back-to-back configuration free of the self-bias problem that prevents standard Schottky varactors from employing such an arrangement. Implemented in 130 nm CMOS, the circuit achieves a 28 dB conversion loss at 102 GHz with an output power of -20 dBm.

• 出版日期2013-10