摘要

Contemporary models fail to include the influence of the output buffer capacitor size on the performance of capacitive DC-DC converters. This letter examines the relevance of this dependency and shows how to adapt existing models in order to include it. The improved model is verified mathematically for down-converters, by means of Spice simulations and based on measurements of silicon integrated prototypes. Measurements demonstrate an accuracy improvement of up to 30 % compared with the conventional model.

  • 出版日期2012-7