A DPLL Method Applied to Clock Steering

作者：Wu, Yiwei; Gong, Hang; Zhu, Xiangwei^*; Ou, Gang

来源：IEEE Transactions on Instrumentation and Measurement, 2016, 65(6): 1331-1342.

DOI：10.1109/TIM.2016.2526699

• Clock steering
• digital phase-locked loop (DPLL)
• frequency stability
• Kalman filter
• steering error

Several closed-loop control methods have dealt with clock steering problems, but parameters for these methods are not easy to choose. In this paper, we propose a new clock steering method, which uses a second-order type-2 digital phase-locked loop (DPLL) equivalent to a two-state Kalman filter with a delay. We derive the approximate expressions of the steady-state Kalman gains, which are equivalent to the DPLL gains. Then, we derive the transfer functions of the approximate DPLL. A brief and effective approach to choosing a parameter is also proposed. Simulation results show that the performance of the time steering error and the frequency stability is quite desirable, and can meet the requirements of generating a local representation of coordinated universal time or a global navigation satellite system time.

• 出版日期2016-6
• 单位中国人民解放军国防科学技术大学