摘要

Electrostatic discharge (ESD) failure has become an emerging challenge for radio frequency (RF) integrated circuits (ICs), which requires high ESD-protection for circuit applications in harsh environment. This paper discusses the design and optimization of an ultra-wideband (UWB) correlator circuit using ESD-aware simulation design technique. Mixed-mode ESD simulation-design method and RF ESD characterization technique are presented for accurate ESD device design and ESD-induced parasitic effects extraction. The impact of ESD induced parasitic is carefully considered in the whole correlator design simulation by using a direct S-parameter insertion technique. The design is based on a commercial 0.18 mu m RFCMOS technology.

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