A 5.25-GHz low-power down-conversion mixer in 0.18-μm CMOS technology

作者：Chen, Jun-Da^*; Lin, Zhi-Ming; Row, Jeen-Sheen

来源：Analog Integrated Circuits and Signal Processing, 2010, 62(3): 301-312.

DOI：10.1007/s10470-009-9347-1

• CMOS mixer
• Double side band (DSB) noise figure
• Gilbert cell mixers

A 5.25 GHz low voltage, high linear and isolated mixer using TSMC 0.18 mu m CMOS process for WLAN receiver was investigated. The paper presents a novel topology mixer that leads to better performance in terms of linearity, isolation and power consumption for low supply voltage. The measuring results of the proposed mixer achieve: 7.6 dB power conversion gain, 11.4 dB double side band noise figure, 3 dBm input third-order intercept point, and the total dc power consumption of this mixer including output buffers is 2.45 mW from a 1 V supply voltage. The current output buffer is about 2 mW, the excellent LO-RF, LO-IF and RF-IF isolation achieved up to 37.8, 54.8 and 38.2 dB, respectively.

• 出版日期2010-3