Diamond logic inverter with enhancement-mode metal-insulator-semiconductor field effect transistor

作者：Liu J W^*; Liao M Y; Imura M; Watanabe E; Oosato H; Koide Y

来源：Applied Physics Letters, 2014, 105(8): 082110.

DOI：10.1063/1.4894291

A diamond logic inverter is demonstrated using an enhancement-mode hydrogenated-diamond metal-insulator-semiconductor field effect transistor (MISFET) coupled with a load resistor. The gate insulator has a bilayer structure of a sputtering-deposited LaAlO3 layer and a thin atomic-layer-deposited Al2O3 buffer layer. The source-drain current maximum, extrinsic transconductance, and threshold voltage of the MISFET are measured to be -40.7 mA.mm(-1), 13.2 +/- 0.1 mS.mm(-1), and -3.1 +/- 0.1 V, respectively. The logic inverters show distinct inversion (NOT-gate) characteristics for input voltages ranging from 4.0 to -10.0 V. With increasing the load resistance, the gain of the logic inverter increases from 5.6 to as large as 19.4. The pulse response against the high and low input voltages shows the inversion response with the low and high output voltages.

• 出版日期2014-8-25