摘要

A novel envelope modulator for envelope tracking RF power amplifier (PA) is presented in this paper. The proposed modulator consists of a parallel combination of analog class AB and digitally controlled hybrid PAs. The analog and digital class AB PAs are effective in both reducing the clock frequency and also static power dissipation, thus improving the efficiency of the modulator. On the other hand, lower clock frequencies result in simpler and more powerefficient digital to analog converters required in the architecture. The modulator digital block is evaluated with a 45 nm CMOS technology. The overall power consumption of the digital block is around 76 mW at 800 MHz clock frequency. As an application, the designed digital block is incorporated in a complete envelope modulator architecture. The overall efficiency of the modulator, including the digital block power consumption, is around 80.7% at an average 32 dBm output power for a 5 MHz input signal.

  • 出版日期2017-10