摘要
This paper introduces a new technique to design an analog MOS switch to be used in sampled-data circuits. In any sampled-data system, the accuracy of the sampling switch is a critical parameter to determine the overall performance of the system. To satisfy accuracy requirements of the switch, a novel technique to reduce channel charge injection error is proposed. The proposed switch has a very simple structure and it uses a small area of the chip. Also, it has a low on-resistance and its variation over the input signal range is acceptable. In order to evaluate the performance of the proposed switch, simulations are done in a 0.18 mu m standard CMOS technology. Simulation results show that the sampling errors produced by the channel charge injection is eliminated through a cancellation technique using an auxiliary transistor. The output error charge due to charge injection over a wide range of the input signal variation is very low (less than 1.45 fC). Also, simulation results show that the proposed switch achieves signal-to-noise plus distortion ratio (SNDR) of 85.05 dB, effective number of bits (ENOB) of 13.83, total harmonic distortion (THD) of -87.23 dB and spurious-free dynamic range (SFDR) of 88.14 dB for a 1MHz sinusoidal input of 800 mV peak-to-peak amplitude at 50 MHz sampling rate with a 1.8 V supply voltage.
- 出版日期2018-7