A 2.7 mW/Channel 48-1000 MHz Direct Sampling Full-Band Cable Receiver

作者：Wu, Jiangfeng^*; Cusmai, Giuseppe; Chou, Acer Wei-Te; Wang, Tao; Shen, Bo; Periasamy, Vijayaramalingam; Hsieh, Ming-Hung; Chen, Chun-Ying; He, Lin; Tan, Loke Kun; Padyana, Aravind; Yang, Vincent Cheng-Hsun; Unruh, Gregory; Wong, Jackie Koon Lun; Hung, Bryan Juo-Jung; Brandolini, Massimo; Lin, Maco Sha-Ting; Chen, Xi; Ding, Yen; Ko, Yen-Jen; Shin, Young J.; Hung, Ada Hing T.; Chen, Binning; Dang, Cynthia; Lakshminarasimhan, Deepak; Liu, Hong; Lin, Jerry; Lai, Kowen; Wassermann, Larry

来源：IEEE Journal of Solid-State Circuits, 2016, 51(4): 845-859.

DOI：10.1109/JSSC.2015.2511164

• Analog-to-digital converter (ADC)
• digital compensation
• digital phase-locked loop (PLL)
• digital signal processing (DSP)
• digitally assisted analog
• direct sampling
• full-band capture (FBC)

A direct sampling full-band capture (FBC) receiver for cable and digital TV applications is presented. It consists of a 0.18 mu m BiCMOS low-noise amplifier (LNA) and a 28 nm CMOS direct RF sampling receiver based on a 2.7 GS/s analog-to-digital converter (ADC) embedded in a system-on-chip (SoC). Digital signal processing (DSP) plays critical roles to assist analog circuits in providing functionalities and enhancing performances, including digital automatic gain control (AGC), digital phase-locked loop (PLL), and digital ADC compensation. The receiver is capable of receiving 158 256 QAM channels from 48 to 1000 MHz simultaneously, achieving up to 10 Gb/s data throughput for data and video while exceeding Data over cable service interface specification (DOCSIS) and Society of Cable Telecommunications Engineers (SCTE) requirements. The CMOS receiver occupies 1 mm(2) area while consuming 300 mW. The LNA consumes 130 mW and occupies 3 mm(2) area. The total power dissipation from the receiver is 2.7 mW per 6 MHz channel when capturing the entire cable spectrum.

• 出版日期2016-4
• 单位同济大学