摘要

In digital signal processing, the parity bits are frequently used to detect errors during transmission of binary information. A parity bit is an extra bit included with a binary message to make the number of l's either odd or even. The message including the parity bit is transmitted and then checked at the receiving end for errors. The circuit that generates the parity bit in the transmitter end is called a parity generator and the circuit that checks the parity in the receiver is called a parity checker. In this paper, all-optical parallel scheme of parity generator has been proposed with the help of semiconductor optical amplifier (SOA)-assisted Sagnac gate. The operations of the circuit is studied theoretically and analyzed through numerical simulations. It explains the scope of the research and principal findings.

  • 出版日期2014-2-15