An accurate and highly-efficient performance evaluation approach based on queuing model for on-chip network

作者：Lai MingChe^*; Gao Lei; Xiao Nong; Wang ZhiYing

来源：Science China Information Sciences, 2013, 56(7): 078107.

DOI：10.1007/s11432-012-4648-x

• on-chip network
• model
• performance analysis

An accurate and highly-efficient analysis approach is crucial for a designer to evaluate the performance of on-chip networks. To this end, the novel M/G/1/N queuing models that capture various blocking phenomenon of the wormhole switching router are presented to compute the average waiting time accurately. With the M/G/1/N queuing models, this paper then presents the performance analysis algorithm to estimate some key metrics in terms of packet latency, buffer utilization, etc. The comparisons with SystemC simulated results show that the proposed approach with mean errors of 6.9% and 7.8% achieves the speedups of 117 and 101 for single-channel and multi-channel routers respectively. In our design methodology, this approach can direct NoC synthesis process effectively and then can be applied to multi-objective optimizations conveniently to find the best mappings.

• 出版日期2013-7
• 单位中国人民解放军国防科学技术大学