A novel radiation hardened by design latch

作者：Huang Zhengfeng^*; Liang Huaguo

来源：Chinese Journal of Semiconductors, 2009, 30(3): 035007.

DOI：10.1088/1674-4926/30/3/035007

• Area efficient
• Fault injection
• High-energy particles
• Power delay product
• Power dissipation
• Power efficient
• Propagation delays
• Radiation hardened by design
• Radiation-induced
• Single event upsets
• Single-events
• Soft error
• SPICE simulations
• Technology scaling
• VLSI chip

Due to aggressive technology scaling, radiation-induced soft errors have become a serious reliability concern in VLSI chip design. This paper presents a novel radiation hardened by design latch with high single-event-upset (SEU) immunity. The proposed latch can effectively mitigate SEU by internal dual interlocked scheme. The propagation delay, power dissipation and power delay product of the presented latch are evaluated by detailed SPICE simulations. Compared with previous SEU-hardening solutions such as TMR-Latch, the presented latch is more area efficient, delay and power efficient. Fault injection simulations also demonstrate the robustness of the presented latch even under high energy particle strikes. ? 2009 Chinese Institute of Electronics.

• 出版日期2009
• 单位合肥工业大学