A Mostly Digital PWM-Based Delta Sigma ADC With an Inherently Matched Multibit Quantizer/DAC

作者：Mortazavi Yousof^*; Jung Wooyoung; Evans Brian L; Hassibi Arjang

来源：IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2016, 63(11): 1049-1053.

DOI：10.1109/TCSII.2016.2538118

• Analog-to-digital converter (ADC)
• delta-sigma (Delta Sigma) modulation
• digital-to-time converter (DTC)
• pulsewidth modulation
• time-to-digital converter (TDC)

A mostly digital pulsewidth-modulator-based delta-sigma (Delta Sigma) analog-to-digital converter is proposed. This system takes advantage of the duration of pulses, rather than voltage or current, as the analog operand used in its closed-loop operation. Therefore, circuits that process the pulses are digital in nature and improve with scaling. Furthermore, the architecture allows inherently matched multibit quantizer/digital-to-analog converter (DAC) blocks by taking advantage of delay lines reusable in both quantization and DAC operation. A second novelty of this architecture is the modulator's adaptive excess delay, which synchronizes the asynchronous loop with an external reference clock. This mitigates the problems associated with nonuniform sampling. A first-order 3-b prototype of this architecture is presented. The core occupies an area of 0.0275 mm(2) in a 0.18-mu m CMOS process, consumes 2.7 mW, and measures a 45.1-dB SNR over a 2-MHz bandwidth.

• 出版日期2016-11