A single-poly EEPROM cell structure compatible to standard CMOS process

作者：Lin Ching Fang^*; Sun Cherng Yuan

来源：Solid-State Electronics, 2007, 51(6): 888-893.

DOI：10.1016/j.sse.2007.05.001

A novel cell structure is proposed for low cost, low capacity EEPROMs. The cell is composed of an NMOSFET and a MOS capacitor with a shared poly-silicon layer that functions as the floating gate of the cell. This nonvolatile cell can be fabricated by a standard CMOS process technology without any extra steps. Detailed analyses are carried out for the dependence of the performance on the capacitance ratios C-C/C-D between the NMOSFET C-D and the MOS capacitor C-C. The efficiencies of program/erase operations, the ability of data retention and the cyclic endurance are also discussed.

• 出版日期2007-6