A 0.35-mu m CMOS DIVIDE-BY-3 LC INJECTION-LOCKED FREQUENCY DIVIDER USING LINEAR MIXERS

作者：Jang Sheng Lyang^*; Chen Han Sheng; Liu Cheng Chen; Juang Miin Horng

来源：Microwave and Optical Technology Letters, 2010, 52(12): 2740-2743.

DOI：10.1002/mop.25597

• 0.35-mu m CMOS
• divide-by-3 injection-locked frequency divider
• linear mixer
• locking range

This letter proposes a divide-by-3 frequency divider employing the linear Mixer topology: the divider was fabricated in the 0.35-mu m CMOS 2P4M CMOS technology. The divider consists of an nMOS cross-coupled LC oscillator and two injection MOSFETs in series with the cross-coupled nMOSFETs. At the drain bias voltage of 1.2 V, the divider free-running frequency is tunable from 3.73 to 3.92 GHz, and at the incident power of 0 dBm, the operational locking range is about 0.69 GHz, from the incident frequency 10.99 to 11.68 GHz. The core power consumption is 6.9 mW. The die area is 0.83 x 0.94 mm(2).

• 出版日期2010-12