A CMOS current-mode squaring circuit free of error resulting from carrier mobility reduction

作者：AL Absi Munir A^*; As Sabban Ibrahim A

来源：Analog Integrated Circuits and Signal Processing, 2014, 81(1): 23-28.

DOI：10.1007/s10470-014-0319-8

• Short channel MOSFET
• Carried mobility reduction
• Squaring circuit
• Current mode

This paper presents a new current-mode squaring circuit. The design is based on MOSFETs translinear principle in strong inversion. A new compensation technique to minimize the second order effects caused by carrier mobility reduction in short channel MOSFETs is proposed. Tanner T-spice simulation tool is used to confirm the functionality of the proposed design in 0.18 A mu m CMOS process technology. Simulation results indicate that the maximum linearity error is 1.2 %; power consumption is 326 A mu W and bandwidth of 340 MHz.

• 出版日期2014-10